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? semiconductor components industries, llc, 2017 june, 2018 ? rev. 4 1 publication order number: n57m5114/d n57m5114 32\tap digital potentiometer (pot) description the n57m5114 is a single digital pot designed as an electronic replacement for mechanical potentiometers and trim pots. ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment. the n57m5114 contains a 32-tap series resistor array connected between two terminals r h and r l . an up/down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, r w . the wiper setting, stored in nonvolatile memory, is not lost when the device is powered down and is automatically reinstated when power is returned. the wiper can be adjusted to test new system values without affecting the stored setting. wiper-control of the n57m5114 is accomplished with three input control pins, cs , u/d , and inc . the inc input increments the wiper in the direction which is determined by the logic state of the u/d input. the cs input is used to select the device and also store the wiper position prior to power down. the digital pot can be used as a three-terminal resistive divider or as a two-terminal variable resistor. digital pots bring variability and programmability to a wide variety of applications including control, parameter adjustments, and signal processing. features ? 32-position linear taper potentiometer ? non-volatile eeprom wiper storage ? low standby current ? single supply operation: 2.5 v ? 6.0 v ? increment up/down serial interface ? resistance values: 10 k , 50 k and 100 k ? available in soic, tssop, msop and space saving 2 3 mm tdfn packages ? these devices are pb-free, halogen free/bfr free and are rohs compliant applications ? automated product calibration ? remote control adjustments ? offset, gain and zero control ? tamper-proof calibrations ? contrast, brightness and volume controls ? motor controls and feedback systems ? programmable analog functions www. onsemi.com pin configurations r h r w r l u/d inc v cc cs 1 see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information soic?8 v suffix case 751bd msop?8 z suffix case 846ad gnd soic (v), msop (z) tssop?8 y suffix case 948al tssop (y) (top views) gnd r h u/d inc r w cs v cc r l 1 tdfn?8 vp2 suffix case 511ak tdfn (vp2) gnd r h u/d inc r w cs v cc r l 1
n57m5114 www. onsemi.com 2 device marking information abms = 10 k abmt = 50 k abth = 100 k y = production year (last digit) m = production month (1?9, o, n, d) p = product revision r = resistance 2 = 10 k 4 = 50 k 5 = 100 k l = assembly location 4 = lead finish ? nipdau i = industrial temp range y = production year (last digit) m = production month (1?9, o, n, d) xxxx = last four digits of assembly lot number a4 = device code r = resistance 2 = 10 k 4 = 50 k 5 = 100 k l = assembly location 4 = lead finish ? nipdau y = production year (last digit) m = production month (1?9, o, n, d) xxx = last three digits of assembly xxx = lot number tssop soic msop rl4b cat5114vi ymxxxx abms ymp a4rl 4ymxxx tdfn efl xxx ym ef = 10 k hf = 50 k gw = 100 k xxx = last three digits of assembly lot number y = production year (last digit) m = production month (1?9, o, n, d) functional diagram figure 1. general control and memory power on gnd decoder 31 30 29 28 2 1 0 transfer gates resistor array 5?bit nonvolatile memory store and recall control circuitry 5?bit up/down counter gnd figure 2. detailed figure 3. electronic potentiometer implementation v cc cs inc u/d r h /v h r w /v w r l /v l v cc recall cs inc u/d position r h /v h r w /v w r l /v l 32? r h /v h r l /v l r w /v w
n57m5114 www. onsemi.com 3 table 1. pin descriptions name function inc increment control u/d up/down control r h potentiometer high terminal gnd ground r w wiper terminal r l potentiometer low terminal cs chip select v cc supply voltage pin function inc : increment control input the inc input moves the wiper in the up or down direction determined by the condition of the u/d input. u/d : up/down control input the u/d input controls the direction of the wiper movement. when in a high state and cs is low, any high-to-low transition on inc will cause the wiper to move one increment toward the r h terminal. when in a low state and cs is low, any high-to-low transition on inc will cause the wiper to move one increment towards the r l terminal. r h : high end potentiometer terminal r h is the high end terminal of the potentiometer. it is not required that this terminal be connected to a potential greater than the r l terminal. voltage applied to the r h terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r w : wiper potentiometer terminal r w is the wiper terminal of the potentiometer. its position on the resistor array is controlled by the control inputs, inc , u/d and cs . voltage applied to the r w terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r l : low end potentiometer terminal r l is the low end terminal of the potentiometer. it is not required that this terminal be connected to a potential less than the r h terminal. voltage applied to the r l terminal cannot exceed the supply voltage, v cc or go below ground, gnd. r l and r h are electrically interchangeable. cs : chip select the chip select input is used to activate the control input of the n57m5114 and is active low. when in a high state, activity on the inc and u/d inputs will not affect or change the position of the wiper. device operation the n57m5114 operates like a digitally controlled potentiometer with r h and r l equivalent to the high and low terminals and r w equivalent to the mechanical potentiometer?s wiper. there are 32 available tap positions including the resistor end points, r h and r l . there are 31 resistor elements connected in series between the r h and r l terminals. the wiper terminal is connected to one of the 32 taps and controlled by three inputs, inc , u/d and cs . these inputs control a seven-bit up/down counter whose output is decoded to select the wiper position. the selected wiper position can be stored in nonvolatile memory using the inc and cs inputs. with cs set low the n57m5114 is selected and will respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement the wiper (depending on the state of the u/d input and seven?bit counter). the wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. the value of the counter is stored in nonvolatile memory whe never cs transitions high while the inc input is also high. when the n57m5114 is powered-down, the last stored wiper counter position is maintained in the nonvolatile memory. when power is restored, the contents of the memory are recalled and the counter is set to the value stored. with inc set low, the n57m5114 may be de-selected and powered down without storing the current wiper position in nonvolatile memory. this allows the system to always power up to a preset value stored in nonvolatile memory.
n57m5114 www. onsemi.com 4 table 2. operation modes inc cs u/d operation high to low low high wiper toward h high to low low low wiper toward l high low to high x store wiper position low low to high x no store, return to standby x high x standby figure 4. potentiometer equivalent circuit c w r l c l c h r w r wi r h table 3. absolute maximum ratings parameters ratings units supply voltage v cc to gnd ?0.5 to +7 v inputs cs to gnd ?0.5 to v cc +0.5 v inc to gnd ?0.5 to v cc +0.5 v u/d to gnd ?0.5 to v cc +0.5 v h to gnd ?0.5 to v cc +0.5 v l to gnd ?0.5 to v cc +0.5 v w to gnd ?0.5 to v cc +0.5 v operating ambient temperature industrial (?i? suffix) ?40 to +85 c junction temperature +150 c storage temperature ?65 to 150 c lead soldering (10 s max) +300 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. table 4. reliability characteristics symbol parameter test method min typ max units v zap (note 1) esd susceptibility mil?std?883, test method 3015 2000 v i lth (notes 1, 2) latch-up jedec standard 17 100 ma t dr data retention mil?std?883, test method 1008 100 years n end endurance mil?std?883, test method 1033 1,000,000 stores 1. this parameter is tested initially and after a design or process change that affects the parameter. 2. latch-up protection is provided for stresses up to 100 ma on address and data pins from ?1 v to v cc + 1 v.
n57m5114 www. onsemi.com 5 table 5. dc electrical characteristics (v cc = +2.5 v to +6 v unless otherwise specified) symbol parameter conditions min typ max units power supply v cc operating voltage range 2.5 ? 6.0 v i cc1 supply current (increment) v cc = 6 v, f = 1 mhz, i w = 0 ? ? 100 a v cc = 6 v, f = 250 khz, i w = 0 ? ? 50 a i cc2 supply current (write) programming, v cc = 6 v ? ? 1000 a v cc = 3 v ? ? 500 a i sb1 (note 4) supply current (standby) cs = v cc ? 0.3 v u/d , inc = v cc ? 0.3 v or gnd ? ? 1 a logic inputs i ih input leakage current v in = v cc ? ? 10 a i il input leakage current v in = 0 v ? ? ?10 a v ih2 cmos high level input voltage 2.5 v v cc 6 v v cc x 0.7 ? v cc + 0.3 v v il2 cmos low level input voltage ?0.3 ? v cc x 0.2 v potentiometer characteristics r pot potentiometer resistance ?10 device 10 k ?50 device 50 ?00 device 100 pot. resistance tolerance 20 % v rh voltage on r h pin 0 v cc v v rl voltage on r l pin 0 v cc v resolution 3.2 % inl integral linearity error 0.5 lsb dnl differential linearity error 0.25 lsb r wi wiper resistance v cc = 5 v, i w = 1 ma 70 200 v cc = 2.5 v, i w = 1 ma 150 400 i w wiper current ?4.4 4.4 ma tc rpot tc of pot resistance 300 ppm/ c tc ratio ratiometric tc 20 ppm/ c v n noise 100 khz / 1 khz 8/24 nv/ hz c h /c l /c w potentiometer capacitances 8/8/25 pf fc frequency response passive attenuator, 10 k 1.7 mhz product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. this parameter is tested initially and after a design or process change that affects the parameter. 4. latch?up protection is provided for stresses up to 100 ma on address and data pins from ?1 v to v cc + 1 v. 5. i w = source or sink. 6. these parameters are periodically sampled and are not 100% tested.
n57m5114 www. onsemi.com 6 table 6. ac test conditions v cc range 2.5 v v cc 6 v input pulse levels 0.2 x v cc to 0.7 x v cc input rise and fall times 10 ns input reference levels 0.5 x v cc table 7. ac operating characteristics (v cc = +2.5 v to +6.0 v, v h = v cc , v l = 0 v, unless otherwise specified) symbol parameter min typ (note 7) max units t ci cs to inc setup 100 ? ? ns t di u/d to inc setup 50 ? ? ns t id u/d to inc hold 100 ? ? ns t il inc low period 250 ? ? ns t ih inc high period 250 ? ? ns t ic inc inactive to cs inactive 1 ? ? s t cph cs deselect time (no store) 100 ? ? ns t cph cs deselect time (store) 10 ? ? ms t iw inc to v out change ? 1 5 s t cyc inc cycle time 1 ? ? s t r , t f (note 8) inc input rise and fall time ? ? 500 s t pu (note 8) power-up to wiper stable ? ? 1 ms t wr store cycle ? 5 10 ms 7. typical values are for t a = 25 c and nominal supply voltage. 8. this parameter is periodically sampled and not 100% tested. 9. mi in the a.c. timing diagram refers to the minimum incremental change in the w output due to a change in the wiper position. figure 5. a.c. timing 90% 90% 10% (store) t r t f mi (3) t ic t cph t iw r w u/d inc cs t ci t di t id t il t ih t cyc
n57m5114 www. onsemi.com 7 applications information (a) resistive divider (b) variable resistance (c) two?port figure 6. potentiometer configuration applications figure 7. programmable instrumentation amplifier +5 v +2.5 v 2 8 3 2 6 5 7 9 4 10 11 8 1 1 7 4 + ? + ? + ? +5 v n57m5114 digital figure 8. programmable sq. wave oscillator (555) +5 v 0.01 f 0.01 f 0.003 f c 5 3 6 7 8 4 1 2 65 3 2 8 1 7 4 +5 v 555 r 2 r 2 r 1 r 3 r 4 r 4 v 1 (?) v 2 (+) v o a 3 a 1 = a 2 = a 3 = 1 / 4 lm6064 r 2 = r 3 = r 4 = 5 k r pot = 10 k r b r 2 r a r 1 pr pot (1?p)r pot r 3 a 1 a 2 n57m5114 pot digital pot figure 9. programmable voltage regulator figure 10. programmable i to v convertor 0.1 f 1 f 6.8 f 11 k 100 k 1.23 v 2 8 1 7 4 5 3 6 +5 v 2952 n57m5114 fb sd gnd v out v o (reg) r 1 r 2 820 r 3 10 k v in (unreg) shutdown +2.5 v +5 v 2 7 3 3 5 4 6 6 + ? lt1097 +5 v 2 7 3 4 6 + ? 2 8 1 7 4 +5 v n57m5114 pr (1?p)r 330 330 1 m 10 k i s a 1 a 2 v o digital pot digital pot
n57m5114 www. onsemi.com 8 +5 v +5 v +2.5 v +5 v ic3 n57m5114 clo ic1 393 ai ic4 2 3 + ? 1 2 8 1 7 4 +5 v osc ic2 74hc132 0.1 f + ? chi 6 5 5 6 3 + ? 7 +5 v r3 r2 r1 0.001 f 0.001 f 1 f 2 7 3 4 6 + ? 2 8 1 7 4 +5 v n57m5114 +2.5 v figure 11. programmable bandpass filter v o 2.5 v o 5 v v ul v ll r 1 r 3 r 2 10 k v s 0 v s 2.5 v 10 k c 1 c 2 v o v s 10 k 100 k a 1 50 k figure 12. automatic gain control digital pot digital pot
n57m5114 www. onsemi.com 9 table 8. ordering information orderable part numbers resistance values (k ) package?pin lead finish shipping ? n57m5114wd10tg 10 soic?8 nipdau 100 units / rail n57m5114wd50tg 50 n57m5114wd00tg 100 n57m5114vp2d10tg 10 tdfn?8 2 x 3 mm nipdau 3000 / tape & reel n57m5114vp2d50tg 50 n57m5114vp2d00tg 100 n57m5114yd10tg 10 tssop?8 nipdau 3000 / tape & reel n57m5114yd50tg 50 n57m5114yd00tg 100 n57m5114zd10tg 10 msop?8 nipdau 96 units / rail n57m5114zd50tg 50 N57M5114ZD00TG 100 ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. 10. all packages are rohs-compliant (pb-free, halogen-free). 11. the standard lead finish is nipdau. 12. for additional package and temperature options, please contact your nearest on semiconductor sales office.
n57m5114 www. onsemi.com 10 package dimensions soic 8, 150 mils case 751bd issue o e1 e a a1 h l c e b d pin # 1 identification top view side view end view notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec ms-012. symbol min nom max a a1 b c d e e1 e h 0o 8o 0.10 0.33 0.19 0.25 4.80 5.80 3.80 1.27 bsc 1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 l 0.40 1.27 1.35
n57m5114 www. onsemi.com 11 package dimensions msop 8, 3x3 case 846ad issue o e1 e a2 a1 e b d c a top view side view end view l1 l2 l detail a detail a notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec mo-187. symbol min nom max a a1 a2 b c d e e1 e l 0o 6o l2 0.05 0.75 0.22 0.13 0.40 2.90 4.80 2.90 0.65 bsc 0.25 bsc 1.10 0.15 0.95 0.38 0.23 0.80 3.10 5.00 3.10 0.60 3.00 4.90 3.00 l1 0.95 ref 0.10 0.85
n57m5114 www. onsemi.com 12 package dimensions tdfn8, 2x3 case 511ak issue a pin#1 identificatio n e2 e a3 eb d a2 top view side view bottom view pin#1 index area front view a1 a l d2 notes: (1) all dimensions are in millimeters. (2) complies with jedec mo-229. symbol min nom max a 0.70 0.75 0.80 a1 0.00 0.02 0.05 a3 0.20 ref b 0.20 0.25 0.30 d 1.90 2.00 2.10 d2 1.30 1.40 1.50 e 3.00 e2 1.20 1.30 1.40 e 2.90 0.50 typ 3.10 l 0.20 0.30 0.40 a2 0.45 0.55 0.65
n57m5114 www. onsemi.com 13 package dimensions tssop8, 4.4x3 case 948al issue o e1 e a2 a1 e b d c a top view side view end view 1 l1 l notes: (1) all dimensions are in millimeters. angles in degrees. (2) complies with jedec mo-153. symbol min nom max a a1 a2 b c d e e1 e l1 0o 8o l 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30 0.65 bsc 1.00 ref 1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 n57m5114/d literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?

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